Re: 傳輸線大哉問~

看板comm_and_RF作者 (體脂肪35%)時間19年前 (2007/02/08 09:57), 編輯推噓0(000)
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※ 引述《pow (體脂肪35%)》之銘言: : 標題: Re: 傳輸線大哉問~ : 時間: Wed Feb 7 14:40:06 2007 : : : Can KVL and KCL explain the charge forming the channel of a nFET? : : -- : ※ 發信站: 批踢踢實業坊(ptt.cc) : ◆ From: 152.14.55.70 : 推 terrywei:如果能將等效電路推倒出來 就可以 140.138.136.188 02/07 15:31 : 推 sexyman:原 po 這問題純粹是在刁難人,你只要能 140.112.19.162 02/07 15:32 : → sexyman:定義出等效電路就可以,問題是等效電路 140.112.19.162 02/07 15:34 : → sexyman:為何,不是由 KVL 跟 KCL 去解釋的 140.112.19.162 02/07 15:35 This is my opinoin: I think "等效電路" is the bug here. Looks like everybody has been brain-washed by SPICE, where you always need to find a equivalent circuit that contains only primitives to model something. You can't always find a "等效電路". What about a balun or hybrid? Anything more than 2 port is beyond the capability of SPICE. The way we can simulate a most basic transformer in SPICE is....by putting a big resistor across the two floating node and set one as reference. Why? because the simulator won't work if there's no KCL. The resistor will cause error definitely. If it's not tolerable, you'll get a "internal time step too small" error and screwed up pretty bad. So 等效電路 won't always work if you stick with KVL and KCL all the time. -- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 152.14.55.70
文章代碼(AID): #15oeD_Jr (comm_and_RF)
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文章代碼(AID): #15oeD_Jr (comm_and_RF)