[理工] [計組]-cache

看板Grad-ProbAsk作者 (麵包)時間16年前 (2010/01/27 21:26), 編輯推噓0(000)
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You have been given 18 32K*8-bit SRAMs to build an instruction cache for a processor with a 32-bit address.What is the largest size(i.e.,the largest size of the data storage area in bytes)direct-mapped instruction cache that you can build with one-word (32-bit) block?Show the breakdown of yhe address into its cache access components and describe how the various SRAM chips will be used. 這題不太懂要怎麼做 請高手大大幫忙 感謝 -- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 220.131.81.224
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