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[問題] 請問quartus II 陣列輸出要怎麼分開？
[ Electronics ]1 留言, 推噓總分: +1
作者: a149851571 - 發表於 2010/05/22 17:39(15年前)
1F推gm560622:不就直接拉一條a[0]當輸入就好?05/24 15:54
[問題] 請問VHDL和verilog 原文書哪本比較好
[ Electronics ]9 留言, 推噓總分: +6
作者: clock0220 - 發表於 2010/04/17 11:55(15年前)
7F推gm560622:藍皮書>> Verilog HDL:A Guide to Digital Design and04/17 22:06
8F→gm560622:Synthesis04/17 22:06
[問題] Direct form 4-tap FIR (Verilog)
[ Electronics ]7 留言, 推噓總分: +3
作者: gm560622 - 發表於 2010/03/19 20:08(16年前)
3F→gm560622:瞭解了 謝謝!03/20 20:01
7F→gm560622:剛起步學 不太懂>_< 感謝糾正^^03/22 00:23
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