作者查詢 / deathcustom
作者 deathcustom 在 PTT [ Electronics ] 看板的留言(推文), 共1455則
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4F推: 好好跟家人朋友相處,未來你沒甚麼時間了12/29 10:35
7F推: 原PO的問題其實從積分器輸出->S/H ADC->迴授端S/H12/27 09:54
8F→: 就可以知道,必然會有1 clk cycle delay12/27 09:54
46F推: FPGA/CPLD的東西要建起來很快,肯花錢一學期就有12/19 12:04
47F→: 重點是環境、研究方向,教授要叫學弟做甚麼課題?12/19 12:05
48F→: 如果只是隨便做做,那連FPGA都不用,Matlab跟Verilog12/19 12:06
49F→: 模擬跑一跑就好(?)12/19 12:07
53F推: 一群FPGA都沒摸過的要上手起碼要玩個兩個月12/20 10:03
54F→: 比如說把ADDA摸熟、把RS232摸熟、把個別擴充元件摸熟12/20 10:03
55F→: 以台大來說,是一整個學期的數位電路實驗(期末有proj12/20 10:04
56F→: 如果讓老師花了幾萬到十幾萬買了設備,不可能只為了12/20 10:05
57F→: 一個學生,換句話說,怎麼做、該做甚麼都要建立紀錄12/20 10:06
58F→: 而這個老師又是做類比的,沒碰過Verilog的機會很高(?12/20 10:06
59F→: 或者碰過也是很久以前了12/20 10:07
60F→: 所以我才說按照我的經驗應該要一個學期XDDD12/20 10:07
7F推: 在誰上面有最大功率?還是輸出有最大功率?12/19 11:24
4F推: 有回授才有虛短路,但是比較器沒有回授11/28 12:03
27F推: 你可以看CCTu跟THLin的論文,不懂可以上板來問(挖坑)11/21 11:47
1F推: 板主jamtu出來現身說法一下11/19 23:11
1F推: 有問題,我回電腦前再詳細解說11/10 12:25
4F推: Acm ~ -Rc/(re+RE+2R), 當然啦,通常R>>RE與Rc11/07 11:17
8F推: 不管是大電小電,排線變炒麵沒有爆炸嗎?10/30 16:58
12F→: 因為你能旁觀的也只有小電的炒麵啊,大電要是炒麵10/30 17:16
13F→: 那整棟大樓應該電線走火燒光光惹~"~10/30 17:17