Re: [問題]請問varactor的資料

看板comm_and_RF作者deathcustom (沒有目指到@@)時間18年前 (2006/05/16 00:40)推噓2(2推 0噓 0→)

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※ 引述《elian1 (Baseball在面前)》之銘言： : 請問各位前輩 : junction varactor和MOS varactor比較的優缺點為何? : 我是知道個大概但由於要寫論文所以需要詳細的資料 : 但又不知道這方面的詳細資料要去哪找 : 還請知道哪裡找的到這些資料的前輩跟我指點一下感激!! As supply voltages scale down, pn junctions become a less attractive choice for varactors. Specifically, two factors limit the dynamic range of pn-junction capacitances: (1) the weak dependence of the capacitance upon the reverse bias voltage, e.g., Cj = Cj0/(1+Vr/Φb)^m, where m ~ 0.3.; and (2) the narrow control voltage range if forward-biasing the varactor must be avoided. http://www2.ee.ntu.edu.tw/~b1901050/16-05-06_0055.jpg

As an example, consider the LC oscillator shown above. It is desirable to maximize the voltage swings at nodes X and design of the stage(s) driven by the VCO. On the other hand, to avoid forward-biasing the varactors significantly, Vx and Vy must remain above approximately Vcont - 0.4V. Thus, the peak-to-peak swing at each node is limited to about 0.8V. Note that the cathode terminals of the caractors also introduce substantial n-well capacitance at X and Y, further constraining the tuning range. In contrast to pn junctions, MOS varactors are immune to forward biasing while exhibiting a sharper C-V characteristic and a wider dynamic range. If configured as a capacitor(as below), a MOSFET suffers from both a nonmonotonic C-V behavior and a high channel resistance in the region between accumulation and strong inversion. To avoid these issues, an "accumulation-mode" MOS varactor is formd by placing an NMOS device inside an n-well...... http://www2.ee.ntu.edu.tw/~b1901050/16-05-06_0056.jpg