[徵才] MTK USA 誠徵 PI, Power Plan Engineer
各位版友好，幫朋友轉發:
我們是聯發科 Mediatek USA 的 CPU 團隊，辦公室位於德州奧斯汀市 (Austin, TX)。
如果你正計劃在美國長期發展、挑戰自我，我們非常歡迎你的加入。工作需使用英文，會
需要申請者具備一定的英語溝通能力；另外這是本地職缺，公司會協助辦理簽證事宜。
1. Senior Power Integrity (PI) Analysis Engineer
(1) BS/MS/PhD in Electrical Engineering or related field
(2) 5+ years of hands-on power integrity experience on high-performance CPU
or similar high-speed designs.
(3) Deep expertise in static and dynamic IR drop analysis on advanced process
nodes (5 nm or below).
(4) Experience with hierarchical PI analysis, multi-voltage domains, and
multi-clock architectures.
(5) Knowledge of multi-OPP sign-off, including resolving IR/timing conflicts
driven by congestion and clock variation.
(6) Familiarity with low-power design methodologies (CPF/UPF, power gating,
DVFS).
(7) Proficiency with Cadence Voltus and/or Synopsys RedHawk-SC.
2. Senior CPU Power Delivery Engineer
(1) BS/MS/PhD in Electrical Engineering or related field
(2) 5+ years of experience in power delivery or power integrity engineering
for high-performance digital ICs
(3) Hands-on experience with PDN simulation tools (Redhawk, Voltus, SIwave,
or similar)
(4) Solid understanding of CPU microarchitecture power behavior, power
gating, and DVFS
(5) Experience with advanced-node physical design flows (7nm and below)
(6) Familiarity with package and PCB co-design for power delivery
[應徵條件補充]
語言能力：須具備良好的英文溝通能力，以利與美國團隊及客戶協作。
工作地點：德州奧斯汀市 (Austin, TX) (美國缺，非遠端，無長期在美發展意願者請勿投遞)。
簽證協助：公司會提供簽證辦理協助，其餘身份細節可於面試時詳談。
[薪資範圍]
$152,400 - $254,500 annually
[其餘福利]
醫療保險, 401K, 矽谷其他公司基本福利基本都有, 績效獎金及分紅另計
[職缺詳細說明與連結]
詳細的 Job Description 與具體要求請參考以下網址：
1. Senior Power Integrity (PI) Analysis Engineer
https://www.linkedin.com/jobs/view/4426171181
2. Senior CPU Power Delivery Engineer
https://www.linkedin.com/jobs/view/4426169228
歡迎有興趣的板友們直接透過上方連結投遞，或 email: yamo820@hotmail.com
感謝!
--
※ 發信站: 批踢踢實業坊(ptt.cc), 來自: 150.220.103.10 (美國)
※ 文章網址: https://www.ptt.cc/bbs/Tech_Job/M.1781580561.A.AD2.html
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