[問題] 半導體元件物理
手上有幾個關於半導體物理方面的問題
想在這邊請教一下個位,請各位幫小弟解解答吧 感謝!
1.Please draw a typical capacitance vs. gate voltage (C-V)
curve of a p-type MOS capacitor: (a) low frequency,
(b) high frequency, (c) deep depletion.
2.Please draw threshold voltage vs. substrate
bias voltage curve of an nMOS device:
(a) Na = 3E15 cm^-3, (b) Na = 1E16 cm^-3.
3.Please draw circuit diagram and schematic
cross section of a CMOS inverter.
4.Please describe a brief 0.5 um technology
CMOS process flow.
5.Please give an estimation of p-well junction
depth, n+ junction depth, and gate oxide
thickness for 5V MOS device by 0.5 um technology.
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推
04/09 00:10, , 1F
04/09 00:10, 1F
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04/09 00:13, , 2F
04/09 00:13, 2F
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04/09 00:20, , 3F
04/09 00:20, 3F
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04/09 00:28, , 4F
04/09 00:28, 4F
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04/09 12:40, , 5F
04/09 12:40, 5F
噓
04/11 13:37, , 6F
04/11 13:37, 6F
噓
04/11 13:59, , 7F
04/11 13:59, 7F
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