Re: [北美] Job openning for NCG (MSEE/CS/CE)
hi
所有寄給我的resume我都轉寄給我老闆了
他說他會先打電話(不過我不確定是不是每個都打)
大概能準備的就跟job description 上面寫的差不多
verilog RTL C++ FSM
如果你真的會systemverilog跟systemC就自己表達說你會讓他考吧
※ 引述《JasonZZZ (吃吃吃)》之銘言：
: Hi everyone,
: We plan to hire 2 new college graduates in this position.
: Please send your or your friends' resumes to chih-hao.yu@sandisk.com
: Thanks
: Job Title: Design Verification Engineer – NCG
: Job Description:
: In this position, the individual will participate in the logic design and verification of NAND Flash memory products.
: Responsibilities include:
: ‧ RTL and Gate level design verification.
: ‧ Development of test bench using Verilog/SystemVerilog.
: ‧ Development of behavioral models with object oriented language in C++/SystemC.
: ‧ Evaluation and support of digital simulation tools/flows on design methodology.
: ‧ Development of assertions in SystemVerilog.
: Job Qualification:
: NCG with one of following qualifications:
: ‧ MS EE with logic design Verilog RTL focus; as well as C++ knowledge
: ‧ MS CS/CE with strong C++ skills; as well as knowledge in Verilog & logic design
: Job Location: US-Milpitas CA
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※ 發信站: 批踢踢實業坊(ptt.cc)
◆ From: 63.163.107.100
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