[理工] 計組 TLB
A virtual memory system often implements a TLB to speed up the
virtual-to-physical address translation. A TLB has the following characteristics. Assume each
TLB entry has a valid bit, a dirty bit, a tag, and the page number. Determine the exact total
number of bits to implement this TLB.
-It is direct-mapped.
-It has 16 entries.
-The page size is 4K bytes.
-The virtual address space is 4G bytes.
-The physical memory is 1G bytes.
求解
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01/04 09:54, , 1F
01/04 09:54, 1F
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01/04 13:29, , 2F
01/04 13:29, 2F
※ 編輯: PTT007 來自: 220.136.111.245 (01/04 13:30)
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01/04 15:18, , 3F
01/04 15:18, 3F
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01/04 15:18, , 4F
01/04 15:18, 4F
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01/04 15:33, , 5F
01/04 15:33, 5F
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01/04 15:33, , 6F
01/04 15:33, 6F
→
01/04 15:33, , 7F
01/04 15:33, 7F
→
01/04 15:33, , 8F
01/04 15:33, 8F
推
01/04 16:04, , 9F
01/04 16:04, 9F
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01/04 16:05, , 10F
01/04 16:05, 10F
推
01/07 11:05, , 11F
01/07 11:05, 11F
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