[理工] [計組]-快取失誤率
題目有點長..
Suppose we have a processor with base CPI 1.0,assuming all reference hit
in the primary cache, and a clock reate of 500MHZ. Assume a main memory
access time of 200ns,including all the miss handing. Suposse the miss
rate per instruction at the primary cache is 5%. How much faster will
the machine be if we add a second cache that has a 20ns access time for
either a bit or a miss and is large enough to reduce the miss rate to
main memory to 2%.
題目大致上說多加一層cache L2會比單層L1 cache速度還快
[註]： base CPI為在L1 cache 找到資料所需要的clock
我先求單層的
95% (1clock) 5% (200ns)
cpu <----> cache <----->main memory
1clock cycle time = 500MHZ倒數 = 2ns
main memory access 需200ns所以需要 100 clock
則失誤代價= I*0.95*1clock+I*0.05*(100clock+1clock)=6.0I
雙層
95% 5% 2% (200ns)
cpu<----> L1 <-----> L2 <----->main memory
L2 cache 存取20ns 所以 10clock
失誤代價=Ix0.95x1clock +Ix0.05x10 clock +Ix0.02x100 clock
=3.45I
書上解答：
單層的
CPI=CPI base+每個指令的記憶體暫停時賣週期
= 1.0+0.05x100= 6clock
兩層的
CPI = CPI base + 在第一層cache的暫停週期
=1.0+0.05x10+0.02x100 =3.5
6.0 / 3.5 =1.7
我不懂為何我的算法兩層的我算不出來？？？？？而且我觀念錯在哪阿
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※ 編輯: gn00618777 來自: 122.124.203.213 (01/18 19:46)
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