[問題] 如何計算邏輯閘的耗電流
請教諸位先進:
計算邏輯閘的耗電流,是不是
quiescent current +
input pin 數 * input leakage current +
output 推動負載的耗電流?
因為 IC 開出的 absolute maximum limit 裡,
Icc 都不小,應該是都大過正常工作電流許多,
怎麼去評估 IC 的耗電流呢?
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