[問題] 低雜訊, Rail-to-Rail 放大器設計
最近又接到一個 Low-noise rail-to-rail opa 的設計需求。
對方要求 Input noise = 10nV/√Hz @ 1KHz,
Unit-gain bandwidth=3MHz
SR = 1V/μS
Single Power Supply = 3.0V
Supply Current = 100uA (typ.) 200uA (max.)
若製程選用 0.35um CMOS 的話，且不考慮 Chopper Stabilized 這個方法
請問大家還有其他的設計方法可以達成嗎？
還是要換製程？
平常很少接觸 Low-noise 這領域，想聽聽看各位前輩們的看法~
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