[請益] [IC設計]PrimeTime : Startpoint & Endpoint

看板Electronics作者ptta (ptta)時間19年前 (2006/05/05 18:59)推噓2(2推 0噓 0→)

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請問各位，我用Synopsys PrimeTime跑STA時，發現一個奇怪的問題同一個Flip-Flop當Startpoint 與當Endpoint時，他的clock latency竟然不一樣.... 我的operating_condition是single，而且sdf 只讀min case 應該不是operating_condition==chip_variation所造成的請各位大大告訴我哪裡錯了？感謝您的幫忙!! 報告如下： ==================================================================== Startpoint: TOP/ALC/ALC_ALU/FIR/state_reg_8_ (rising edge-triggered flip-flop clocked by CLK) Endpoint: TOP/ALC/ALC_ALU/FIR/state_reg_7_ (rising edge-triggered flip-flop clocked by CLK) Path Group: CLK Path Type: min Point Incr Path ------------------------------------------------------------------------------ clock CLK (rise edge) 0.00 0.00 clock network delay (propagated) 5.30 5.30 TOP/ALC/ALC_ALU/FIR/state_reg_8_/CK (QDFFRBN) 0.00 5.30 r TOP/ALC/ALC_ALU/FIR/state_reg_8_/Q (QDFFRBN) 0.32 5.61 r TOP/ALC/ALC_ALU/FIR/state_reg_8_L1/O (BUF1L) 0.16 * 5.78 r TOP/ALC/ALC_ALU/FIR/state_reg_7_/D (QDFFRBN) 0.00 * 5.78 r data arrival time 5.78 clock CLK (rise edge) 0.00 0.00 clock network delay (propagated) 5.67 5.67 clock uncertainty 0.10 5.77 TOP/ALC/ALC_ALU/FIR/state_reg_7_/CK (QDFFRBN) 5.77 r library hold time 0.19 5.96 data required time 5.96 ------------------------------------------------------------------------------ data required time 5.96 data arrival time -5.78 ------------------------------------------------------------------------------ slack (VIOLATED) -0.19 Startpoint: TOP/ALC/ALC_ALU/FIR/state_reg_9_ (rising edge-triggered flip-flop clocked by CLK) Endpoint: TOP/ALC/ALC_ALU/FIR/state_reg_8_ (rising edge-triggered flip-flop clocked by CLK) Path Group: CLK Path Type: min Point Incr Path ------------------------------------------------------------------------------ clock CLK (rise edge) 0.00 0.00 clock network delay (propagated) 5.30 5.30 TOP/ALC/ALC_ALU/FIR/state_reg_9_/CK (QDFFRBN) 0.00 5.30 r TOP/ALC/ALC_ALU/FIR/state_reg_9_/Q (QDFFRBN) 0.32 5.61 r TOP/ALC/ALC_ALU/FIR/state_reg_9_ASTfhInst1975/O (BUF1L) 0.15 * 5.77 r TOP/ALC/ALC_ALU/FIR/state_reg_8_/D (QDFFRBN) 0.00 * 5.77 r data arrival time 5.77 clock CLK (rise edge) 0.00 0.00 clock network delay (propagated) 5.67 5.67 clock uncertainty 0.10 5.77 TOP/ALC/ALC_ALU/FIR/state_reg_8_/CK (QDFFRBN) 5.77 r library hold time 0.19 5.96 data required time 5.96 ------------------------------------------------------------------------------ data required time 5.96 data arrival time -5.77 ------------------------------------------------------------------------------ slack (VIOLATED) -0.20 [end] -- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 61.30.17.225

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tkhan

05/06 08:18, , 1^F

05/06 08:18, 1^F

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klove

05/06 18:08, , 2^F

05/06 18:08, 2^F

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