Re: IPIQ messaging patch #1 for SMP

看板DFBSD_submit作者時間21年前 (2005/04/10 21:01), 編輯推噓0(000)
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On Sun, Apr 10, 2005 at 12:01:33AM -0700, Matthew Dillon wrote: > * Implement a passive IPI message that does not signal the target cpu > at all. The target cpu will process the message the next time it > polls the queue (no less often then once a tick). Adjust the > slab free() code to use this new API when freeing blocks owned by > a different cpu. Such messages have huge target latencies (obviously) > but cost virtually nothing on either the originating or target cpus > because no hardware IPI is generated for the message. How does this affect low memory situations? Joerg
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文章代碼(AID): #12MIEU00 (DFBSD_submit)