Re: [新聞] 竹科工程師偷腥10多女挨告拋出妻外遇床照反擊「各玩各已刪文

看板sex作者joseph0911 (約瑟芬)時間3年前 (2020/12/04 15:32)推噓-6(1推 7噓 4→)

留言12則, 11人參與討論串1/1

※ 引述《mmonkeyboyy (great)》之銘言： : 這又是我領域的好啊當然好啊 : 你這算是寫製程檔這要懂量測和一些模型這工作不錯其實XD : 會做了之後可以跳德州的cadence : 這個是要MS才對那我就用力衝這個，最近這裡工作真的不好找，好不容易有個ic相關的職缺流出，我準備找朋友內推了。其實蠻巧的，前陣子問您關於製程檔使用的方法以及觀念，說不定能派上用場。但還是想問，就您的經驗來說，這工作主要重點在哪裡呢？我準備修改一下履歷，多寫上幾個相關的關鍵字，對症下藥。（還是不建議這麼做？目前我手上有個履歷是專門針對ic設計的，如圖，這份比較熟悉。回答起來我相信會很順，但就沒有太多eda相關就是了。） https://ptt.cc/flAi1x （很菜，沒什麼學經歷，請見諒。）目前彈藥庫有 VLSI project(layout到standard library） ASIC Project(Verilog 到physical design) LNA design( 在awr mwo裡面用s parameter設計，使用s2p file) deep learning project(水課，用python) 請指教了，謝謝。剛剛看了幾個skill對cadence的範例，起床準備惡補一下... : ※ 引述《joseph0911 (約瑟芬)》之銘言： : : 好那這兩個我都先申請。 : : 那這個 Eda /pdk /adk engineer呢？ : : @qorvo : : 是否完全沒機會？乾脆就別丟了。 : : 有看了大概介紹，但還是想問工作內容大概是什麼呢？ : : （有coding經驗，但不是寫純軟那種，都是寫一些C的程式） : : （以下從網站複製貼上） : : SUMMARY: : : The successful candidate will join a small team of EDA/PDK engineers enabling software tools used in the design flow for RF-ICs, modules and packages. The position will involve development and ma : : RESPONSIBILITIES: : : Develop and maintain PDKs/ADKs and support infrastructure for use with Keysight’s Advanced Design System (ADS), Cadence's Virtuoso and MicroWave Office (MWO) for design of custom Radio Frequency : : Module technologies include SAW/BAW IC, Laminate, GaAs/GaN IC & Si IC : : Implement Calibre DRC and LVS rule sets : : Develop and manage IP Block Library structure : : Support and enhance the engineering design flow from schematic design entry and simulation to layout, Electromagnetic simulation, design verification and tape out : : Create project specifications and requirements in cooperation with engineering teams : : Provide training, assistance and direct interface with external and internal customer designers/users of the EDA infrastructure (PDK/ADK/DRC/LVS) working in a heterogeneous environment (Windows a : : Provide training, assistance and direct interface with external and internal customer designers/users of the EDA infrastructure (PDK/ADK/DRC/LVS) working in a heterogeneous environment (Windows a : : Maintain EDA infrastructure and assist engineers in the installation and setup of EDA tools : : Develop scripts to automate design engineering problems : : Build and maintain SharePoint sites for the EDA team : : QUALIFICATIONS: : : Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science (or equivalent and relevant experience) : : 2 or more years of experience in the field of Electronic Design Automation (EDA) is required : : Proficiency in writing Linux shell scripts, VB, C/C++, PERL, Python and general programming is required : : Effective interpersonal communication and documentation skills are required : : Familiarity with any or all of the following design tools is required: Cadence MicroWave Office (MWO), Ansys HFSS, Keysight ADS, Cadence Virtuoso, Mentor Pyxis. : : Experience developing and supporting programming infrastructure for any or all of the following design tools is desired: Keysight ADS, Cadence Virtuoso, Cadence MWO, Ansys HFSS etc. : : Experience with high performance RF IC and/or module design verification, including DRC and LVS, is desirable : : Experience with writing SKILL, Ample and/or AEL scripts is desired : : Prior experience with EDA development and support of packaging technologies will be a plus : : Experience with system administration for heterogeneous computing (Linux/UNIX) is desired : : Experience in developing process design kits for Cadence Virtuoso, ADS and/or MWO : : Experience in developing Calibre and/or Assura DRC or LVS rule sets for IC processes -- ※ 發信站: 批踢踢實業坊(ptt.cc), 來自: 76.184.244.194 (美國) ※ 文章網址: https://www.ptt.cc/bbs/sex/M.1607067165.A.934.html

→

kevinmeng2

12/04 15:35, 3年前 , 1^F

12/04 15:35, 1^F

噓

okderla

12/04 15:44, 3年前 , 2^F

12/04 15:44, 2^F

噓

joestoman

12/04 15:48, 3年前 , 3^F

12/04 15:48, 3^F