[徵才] 美信半導體徵 ic 設計工程師

看板Tech_Job作者hiippo (hiippo)時間3年前 (2021/04/22 17:53)推噓12(12推 0噓 6→)

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[公司名稱] 美信半導體 [公司網站] https://www.maximintegrated.com/en.html [公司地址] No. 223號, 臺北市松江路223號 [公司簡介] 美信半導體(預估年中合併為ADI) Maxim is seeking several Entry-Level IC Design Engineers to define, design, mo del, and implement analog, mixed-signal, and/or digital integrated circuits (ICs). As an IC Design Engineer, you will have the opportu nity to work on technology for products in exciting industries such as automotive, mobile, cloud & data, industrial, healthcare, and micros & security. [職位及待遇] IC design engineer 月薪100K+ (依工作經驗討論 ) &2個月年終股票講金等 [工作時間] 符合台灣勞動法規彈性不用打卡 [徵才條件] 電機資工相關科系,最好有IC tapeout flow的經驗(+) 2~5y經驗佳,0+也可嘗試主要跟美國team合作,中上程度英語能力(敢說會聽) Security IC 經驗佳,徵才部門為本bu最賺錢部門,進去得道升天(?) Preferred Qualifications ? Write reusable RTL code, follow design and DFT guidelines ? Run digital simulations using industry standard tools ? Write C and Assembly code-based tests to verify SoC functionality ? Strong background in processor design preferred ? Have familiarity with System Verilog for verification, OVM/UVM, asser tions, cover points ? Exposure to physical design and timing closure ? Hands-on IC design experience ? Superior analytical and problem solving skills ? Ability to self-manage and meet deadlines ? Strong verbal and written communication skills ? Ability to work in teams and collaborate cross functionally [Job Description] Responsibilities may include, but are not limited to: ? Design activities including research, definition, design, simulation , layout verification, characterization, and release to production of integrated circuits ? Supporting product definition teams to develop product requirements and specifications ? Analyzing and developing chip architectures to meet required complia nce and performance ? Authoring system architecture and circuit documentation ? Perform RTL design of block level modules ? Simulate at the block level and SoC level to guarantee design object ive specification functionality and timing ? Simulate and debug gate level timing simulations at SoC level ? Defining system and block level test plans ? Characterizing and validating circuit performance in the lab ? Providing support for high volume manufacturing, and working with Pr oduct and Test teams to transfer ICs to production [應徵方式] 請mail到此信箱 shawn.ho@maximintegrated.com -- ※ 發信站: 批踢踢實業坊(ptt.cc), 來自: 39.11.70.120 (臺灣) ※ 文章網址: https://www.ptt.cc/bbs/Tech_Job/M.1619085188.A.F4C.html

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vinsanity25

04/22 18:16, 3年前 , 1^F

04/22 18:16, 1^F

欸應該是不只，不過也是看個人造化說太死我也沒辦法補 ※ 編輯: hiippo (39.11.70.120 臺灣), 04/22/2021 18:28:19

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lp123gbaj

04/22 19:01, 3年前 , 2^F

04/22 19:01, 2^F

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fredko4ko4

04/22 19:23, 3年前 , 3^F