【工作職缺】新竹-聯發科IOT數位設計工程師
【工作時間】早上0830-下午1730 周休二日 (加班費另計)
【工作內容】
1.Architecture design and RTL implementation of Wearable chipset
2.IoT SoC and platform design
3.System bus and peripheral designs
4.SoC system performance analysis
5.Design Verification
【其他條件】
1. Familiar with digital IC design, DFT, and FPGA emulation flow
2. Experienced in SoC architecture, Embedded Processor
(DSP/MCU), and bus (ARM bus) system architecture design is a plus
3. Experienced in chip integration is a plus
4. Experience with External Memory Interface design is a plus
5. Experience with system verification job is a plus
6. Experience with security hardware design is a plus
7. Experience with DRAM bandwidth improvement is a plus
8. Experience with analog/digital interface design is a plus
9. Experience at design verification is a plus
【薪資】
根據年資而定 沒經驗者底薪一年至少1Ｍ 分紅另計
【需求人數】
1位
【工作地點】
新竹科學園區
【徵才網頁】
http://careers.mediatek.com/eREC/JobSearch/JobDetail/MTK120160728003?langKey=zh-TW
剛畢業的同學也歡迎
謝謝!!
※ 編輯: Cheli (60.250.185.98), 08/03/2016 10:09:16
推
08/03 16:29, , 1F
08/03 16:29, 1F