[北美] 美國當製程整合工程師, 履歷建議

看板Oversea_Job作者doki777 (doki)時間11年前 (2013/02/08 03:04)推噓5(5推 0噓 18→)

留言23則, 5人參與討論串1/1

請問有版友在美國當半導體製程整合工程師嗎? 因為第一個電話面試, 對方主管說從我的RESUME看不到我以前作了甚麼想請有相關經驗的版友給我一些建議我本身在台灣有五年工作經驗跟面試的公司是正相關我履歷上兩個工作經驗, 都各自寫上兩句話寫出重要的成就(成功開發了甚麼產品, 跟提升多少良率) 跟主要負責的工作內容的科技 (eg 0.18um製程跟產品類型) 下面再列出細項, 列出主要會的工作技能例如: CP分析, 良率提升.....etc 履歷是只有寫一頁, 就重點條列自己以為這樣寫得很清楚但今天電話面試完, 開始懷疑履歷是不是寫太差了 >///< 有點不確定的地方是我是否需要把我開發產品過程中, 所遇到的問題, 如何解決都一一寫出來嗎?? 到底需要詳細到甚麼程度呢? 我本以為是寫出達成目標然後面試中再跟對方口頭解釋怎麼達到目標即可, 但這樣會太簡略嗎?? 沒想到第一個面試就是我的dream job, 連練習interview的機會都沒有就趕鴨子上架真的很希望能好好把握這個機會謝謝大家, 有任何建議歡迎各位指導感激不盡 & 新年快樂這邊也貼上我的履歷給大家參考, 看我應該如何改進會比較好, 謝謝 Highly analytical and work efficient engineer with 5 years of process integration and development experience in semiconductor industry. Work experience XXXXXXXXXXXXXXXXXXXX, Hsinchu, Taiwan Oct., 2010~ Dec., 2011 Senior Foundry Engineer/ R&D Center/ Pixel Design Department - Successfully improve yield from 30~50% to 80% by ion implantation split experiment. - Performed R&D and successfully produced 0.13um, 0.11um, 90nm process, 8 inch wafer CIS product. - Main responsibilities include new product/ technology development and transfer to mass production. ‧ CP analysis ‧ Yield improvement (RD to Production stage) ‧ Process integration ‧ Liaison between designer and foundry fab ‧ Design experiment to improve product performance ‧ New FAB product and process development XXXXXXXXXXXXXXXXXXXXXX, Hsinchu, Taiwan Dec., 2006~ Apr.,2010 Senior Process Integration Engineer/Special Technology Division/ CMOS Image Sensor Department - Ramp up CIS product from development stage to mass production, produced yield improvement from 0~20% to 70%. - Main responsibilities include new product development and assist mass production. - Responsible for development of Backside illumination (BSI) CIS (new product). ‧ Patent research ‧ Process flow set-up/experiment design ‧ New process vendor and apparatus survey ‧ Trouble shooting/problem analysis Job Skills ‧ CP analysis/ Yield enhancement ‧ FEOL/ BEOL/ CFA process improvement ‧ Troubleshooting/ data & root cause analysis ‧ Communicate with cross function engineers ‧ Product management ‧ Semiconductor process integration ‧ Knowledge of TCAD simulation ‧ Knowledge of characterization/ package/ Final Test Education XXXXXXXXXXXXXXXXX, Taipei, Taiwan Aug., 2004~ July, 2006 Master degree/ Materials Science and Engineering/ Optoelectronic Thin-Film Processing Lab - Successfully deposited an Al2O3 inorganic layer by atomic layer deposition (ALD) on polyimide (PI) substrates to achieve the requirement of OLED’s, 10-3 c.c./m2．day of OTR. - Developed a simple, yet sensitive, permeation measurement method based on helium permeation to evaluate the thin film barrier properties. (Patent applied) XXXXXXXXXXXXXXXXX, Taipei, Taiwan Aug.,2000~ July, 2002 BS degree/ Chemical Engineering Language ‧ Chinese/ Mandarin Write/Read/ Speak/ Listen Native language ‧ English Write/Read/ Speak/ Listen Fluent -- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 72.211.196.212

推

shela

02/08 05:24, , 1^F

02/08 05:24, 1^F

推

shela

02/08 05:29, , 2^F

02/08 05:29, 2^F

→

doki777

02/08 07:40, , 3^F

02/08 07:40, 3^F