[問題] 計組(中山97)
A 2.0 GHz microprocessor runs a program of 1000 assembly instructions.
Given the following assumptions:
(a)all the instructions are 32-bit long and they all use immediate addressing
mode.
(b)one memory location can accommedate one 32-bit instruction.
(c)an address or data bus cycle will take 2 CPU cycles.
(d)address bus and data bus are both 16-bit wide.
(e)after an instruction is fetched from memory to instruction register,it
requires 1 cycle for instruction decoding,2 cycles for instruction
execution,and 1cycle for storing the result to register.
(f)no instruciont pipelining allowed.
問CPI是多少?
看解答有些疑惑，想問一下。
解答是CPI=10
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◆ From: 60.198.3.4
推
03/23 19:09, , 1F
03/23 19:09, 1F
推
03/23 19:12, , 2F
03/23 19:12, 2F
instruction fetch需 2 + 2*2 = 6
(send address) (32-bits需傳兩次)
=>CPI=6+1+2+1=10
這樣有對嗎?
各位的算法是怎麼樣勒??
※ 編輯: rednim 來自: 60.198.3.4 (03/23 19:42)
推
03/23 19:51, , 3F
03/23 19:51, 3F
→
03/23 20:03, , 4F
03/23 20:03, 4F
推
03/23 22:55, , 5F
03/23 22:55, 5F
→
03/23 23:00, , 6F
03/23 23:00, 6F