[問題] Common Source amplifier設計問題
各位大神好
小弟最近在做進碩班前的練習
現在在做Common Source amplifier with diode connected pmos
題目要求Av要達到-16 大概 24.08db
電路圖 http://i.imgur.com/SpysAN4.jpg
用CIC18模擬
Av=gm1/gm2 or |(Vgs2-Vth2)|/(Vgs1-Vth1) or (un(W/L)1/up(W/L2))^-1
我用W/L算 下去跑db都負的代表Av很小 而且Nmos都線性區 (可能是W過大?
做到最高都13~14db再跑
有點沒頭緒
附上我Hspice程式碼:
* CS with Diode-Connected Load
.GLOBAL gnd! vdd!
m2 vout vout vdd! vdd! p_33 l=1u w=10u
m1 vout g gnd! gnd! n_33 l=1u w=40u
.OPTION POST
.ac dec 10 10.0 10g
.tran 1n 1m start=0.0
.MEAS AC dcgain MAX vdb(vout,0)
.op
.dc vin 0 3.3 0.1
.print dc i(m1) vout(m1)
vin g a AC 1
v1 a gnd! sin(1 50m 10K 0 0 0)
v0 vdd! gnd! DC 3.3
.end
--------------------------
小弟還很菜 請大神們多多指導
謝謝
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※ 編輯: zxc44560 (1.174.249.127), 04/22/2016 01:02:18
※ 編輯: zxc44560 (1.174.249.127), 04/22/2016 01:27:10
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