[請益] on wafer量測之calibration
我目前研究主題是要自己製作電晶體,並量測其RF特性,ft fmax之類,
但我對於calibration不熟,怕畫光罩時出錯,因此想請問一下各位,
我是on wafer的量測,使用GSG pitch 100um之針,
量測的配置為以bias tee連接DC supply與VNA,再把訊號送到probe,
有關於calibration,我查挺多人是以Cascade之ISS(impedance standard substrate)
先calibrate到針尖,然後量測S參數,之後再以open short法作de-embeded,
但因為我們自製元件,不同大小的DUT會搭配不一樣的RF pad,
如果這些pad我都有作相對應的SLOT test structure,
若一開始我直接以這些test structure作SLOT calibration,
是否這些pad的parasitics就會被calibrate掉,而不須做兩階段的calibration?
初入此門,苦無人可問,麻煩各位賜教了~
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※ 編輯: Zoma 來自: 140.112.49.136 (05/02 17:55)
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