[問題] 關於IC Compiler的問題
有個關於ICC的問題,想請教各位先進
我是用TSMC18_Arm 3.1的製程,
前幾天我想要利用ICC的時候,發生一點問題,問題是這樣的:
我在最一開始作design setup時,第一步先create library這邊還OK,
但是當下一步我要import design將我的DC所生成的verilog檔讀進來時,
讀檔進來也沒有問題,但是讀完後會發生兩行warning messages:
"Warning: Conflict unit found: MW tech file power unit is pW; Main Library power unit is nW. (IFS-007)"
"Warning: /mnt/master2/M2008/zjwu/ISCAS_2010/RGB2Y/ICC/ref_lib/tsmc18_fram: bus naming style _<%d> is not consistent with main lib. (MWNL-111)"
而如果不管它繼續往下做都沒有問題,而這問題之前都沒遇過,這幾天才開始的。
但是當我存檔後離開,下次想要再打開之前的檔案時,就會開啟不了...
所以就這問題想請教有何解決方式,或是原因為何?
感恩
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◆ From: 163.13.132.144
※ 編輯: rlpolo123 來自: 163.13.132.144 (04/13 01:26)
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