[問題] post-simulation的performance應該掉很多嗎？
小弟最近練習做一顆簡單的two stage OP(就是smith電子學第九章一開始講的那種類型)
把design的流程跑一遍
畫完layout，drc、lvs也都通過了，pex( R+C+CC )抓完後跑post-simulation
發現一件很奇怪的事..
post-simulation的performance竟然和pre-simulation只差一點點而已...
5個corner都是如此，真的只有差"一點點"而已 @@
dc gain完全沒掉，3db-frequency反而上升了0.00x kHz左右
而phase margin只掉了 0.0xx度
因為第一次畫layout，想說應該performance會很慘
(聽說RF MOS裡pcell的畫法比較好，所以我layout時是參考RF的方法很仔細的畫，
但再怎麼說也不敢預期performance會只差一點點)
現在看到這結果，實在很無言，但我是照著流程在跑，應該步驟沒做錯...
請問這樣看來，是不是我在pex或post-simulation有做錯的可能性很大呢？
好迷惘 Q_Q
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