[問題] verilog寫pipeline出現ㄧ堆warning

看板Electronics作者haosan (K211)時間15年前 (2009/01/08 13:14)推噓6(6推 0噓 16→)

留言22則, 7人參與討論串1/1

※ [本文轉錄自 C_and_CPP 看板] 作者: haosan (K211) 看板: C_and_CPP 標題: [問題] verilog寫pipeline出現ㄧ堆warning 時間: Thu Jan 8 12:44:07 2009 小弟不知道ptt哪裡可以問verilog 所以在這裡發問若違版規告知自d 軟體是用ISE8.2 error ERROR:Pack:198 - NCD was not produced. All logic was removed from design. This warning <EXMEM1/R2data_out_0> is unconnected in block <pipeline>. WARNING:Xst:1291 - FF/Latch <EXMEM1/R2data_out_1> is unconnected in block <pipeline>. WARNING:Xst:1291 - FF/Latch <EXMEM1/R2data_out_2> is unconnected in block <pipeline>. WARNING:Xst:1291 - FF/Latch <EXMEM1/R2data_out_3> is unconnected in block <pipeline>. WARNING:Xst:1291 - FF/Latch <EXMEM1/R2data_out_4> is unconnected in block <pipeline>. WARNING:Xst:1291 - FF/Latch <EXMEM1/R2data_out_5> is unconnected in block <pipeline>. 不只錯EXMEM 其他 IFID IDEX MEMWB regfile 也都錯一樣的 pipeline副程式的EXE/MEM register:(input /output宣告不附上) always@(posedge clk)begin pcsrc_out=pcsrc; memtoreg_out=memtoreg; memwrite_out=memwrite; regwrite_out=regwrite; branchpc_out=branchpc; aluresult_out=aluresult; R2data_out=R2data; signex8_out=signex8; Rdaddr_out=Rdaddr; end 在pipeline主程式裡直接引用: EXMEM EXMEM1(.clk(clk),.pcsrc(pcsrc2),.memtoreg(memtoreg_ex),.memwrite(memwrite_ex),.regwrite(regwrite_ex),.branchpc(PC_4), .aluresult(ALUresult_1),.R2data(R2data_2),.signex8(signex8_2),.Rdaddr(Rd_1), .pcsrc_out(pcsrc2_mem),.memtoreg_out(memtoreg_mem),.memwrite_out(memwrite_mem),.regwrite_out(regwrite_mem),.branchpc_out(PC_5), .aluresult_out(ALUresult_2),.R2data_out(R2data_3),.signex8_out(signex8_3),.Rdaddr_out(Rd_2)); 為什麼會有些錯誤跟警告?還有如何解決? -- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 140.115.208.131

推

bobhsiao

01/08 13:09,

01/08 13:09

-- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 140.115.208.131

推

arclitetank

01/08 14:35, , 1^F

01/08 14:35, 1^F

推

tkhan

01/08 17:51, , 2^F