cvs commit: src/sys/i386/i386 mp_machdep.c src/sys/i386/include
dillon 2005/04/12 21:00:56 PDT
DragonFly src repository
Modified files:
sys/i386/i386 mp_machdep.c
sys/i386/include atomic.h
sys/kern kern_slaballoc.c lwkt_ipiq.c lwkt_token.c
sys/sys thread.h
Log:
Optimize lwkt_send_ipiq() - the IPI based inter-cpu messaging routine.
* Add a passive version which does not initiate any actual hardware IPI.
The message will be handled the next time the target cpu polls the
queue (on each tick typically). Adjust the free() path to use this
version when freeing memory owned by another cpu.
* Add an interlock to avoid reissuing and unnecessarily stalling on
the hardware IPI if a prior hardware IPI to the target cpu has not
yet completed processing.
This feature theoretically means that two cpus can tightly couple a
large number of pipelined messages with only a single actual IPI being
sent.
* Reorganize the hystersis points in the IPIQ FIFOs.
* Change a token livelock warning into a panic if it occurs 10 times in
a row.
* Add a call to lwkt_process_ipiq() just after the AP startup code enables
a cpu, to process any messages that might have built up during startup.
There shouldn't be any, but this may avoid surprises later.
Revision Changes Path
1.33 +8 -1 src/sys/i386/i386/mp_machdep.c
1.9 +6 -3 src/sys/i386/include/atomic.h
1.29 +3 -2 src/sys/kern/kern_slaballoc.c
1.9 +126 -27 src/sys/kern/lwkt_ipiq.c
1.12 +5 -3 src/sys/kern/lwkt_token.c
1.61 +2 -1 src/sys/sys/thread.h
http://www.dragonflybsd.org/cvsweb/src/sys/i386/i386/mp_machdep.c.diff?r1=1.32&r2=1.33&f=u
http://www.dragonflybsd.org/cvsweb/src/sys/i386/include/atomic.h.diff?r1=1.8&r2=1.9&f=u
http://www.dragonflybsd.org/cvsweb/src/sys/kern/kern_slaballoc.c.diff?r1=1.28&r2=1.29&f=u
http://www.dragonflybsd.org/cvsweb/src/sys/kern/lwkt_ipiq.c.diff?r1=1.8&r2=1.9&f=u
http://www.dragonflybsd.org/cvsweb/src/sys/kern/lwkt_token.c.diff?r1=1.11&r2=1.12&f=u
http://www.dragonflybsd.org/cvsweb/src/sys/sys/thread.h.diff?r1=1.60&r2=1.61&f=u